This invention relates to a method for forming and the structure formed thereby of a semiconductor device having rectifying junctions with passivated surfaces at the junctions.
In the art of forming semiconductor devices having rectifying junctions that require passivation in order to prevent degradation of the rectifying junction at the surface it is usual to provide passivating material such as silicon dixoide over the entire surface of the device to be treated. The silicon dixoide is then etched away as by a photoresist process to expose the portions of the device defining the active contact regions. Metal is then deposited over the entire surface covering both the passivating silicon dioxide as well as the exposed contact regions. The metal is then removed by a photoresist process from the portions of the device defining the rectifying junctions.
An improved method for passivating the rectifying junction portions comprises what may be termed "neutralizing" the so-called "dangling bonds" in a semiconductor device by reducing the number of recombination and generation centers at the surface of the device. The procedure and device which achieve such a passivating surface is disclosed in U.S. Application Ser. No. 30,704, filed on Apr. 16, 1979 by J. I. Pankove, entitled "METHOD AND STRUCTURE FOR PASSIVATING A SEMICONDUCTOR DEVICE", now U.S. Pat. No. 4,224,084, issued Sept. 23, 1980.
In general, passivants are added to semiconductor devices to protect the surface from ambient conditions and to otherwise affect the surface material in a desired way. The most commonly used passivant is silicon dioxide which can be either thermally grown on silicon at high temperature (900.degree. C. to 1200.degree. C.) or it can be chemical vapor deposited (CVD) at lower temperatures, typically 400.degree. C. Other passivants are silicon nitride, various silicate glasses, or more recently, SIPOS (semi-insulating polycrystalline silicon) and plasma deposited hydrogenated amorphous silicon. In a conventional method using, for example, silicon dioxide as the passivant, the sequence of etching steps on, initially, the layers of silicon dioxide and, subsequently, on the layer of metal is both costly and time consuming when the etching is done using photolithographic resist techniques. As for the passivation process described by Pankove, supra, which although more high temperature resistant than the plasma deposited hydrogenated amorphous silicon, the problem of degrading the passivant surfaces at the high metal treatment temperatures is still of concern in the art.